China Finds Costly Workaround for Chip Ban

Chinese chipmakers face a difficult financial trade-off to keep up with global rivals. Export controls have blocked access to the most advanced lithography tools from ASML. As a result, the industry relies on older deep ultraviolet machines to produce high-performance silicon. This workaround is effective but expensive and slower than the standard industry method.

The core issue involves a technology gap. ASML is the sole manufacturer of extreme ultraviolet lithography systems. These tools use specific wavelengths of light to print the finest details on modern processors. Analysts suggest China lags five years or more behind Western competitors in this area. The lack of access to these machines has become the primary bottleneck in the country's drive for cutting-edge chips.

Despite the constraints, domestic progress has surprised many observers. A recent teardown of a Huawei smartphone revealed its processor was built without EUV technology. The chip was manufactured by SMIC using a second-generation seven-nanometer process. Further analysis of newer chips suggests SMIC has moved its production capabilities closer to five-nanometer density levels. It still trails the leading processes from TSMC and Samsung, but the gap is narrowing.

The technique used is called multiple patterning. Instead of printing a complex layer in a single pass, manufacturers break the design into simpler parts. They build up the layer step by step using several exposures. Chris Mack, co-founder of Fractilia, notes that this approach involves significant trade-offs. He explained that three exposures on older equipment cost about the same as one EUV pass. However, if four masks are needed, EUV becomes the cheaper option.

Quality control becomes a major challenge with this method. Each new pattern must align perfectly with the previous one. More exposures lead to more accumulated errors and variation in the process. Designers often add extra space around features to compensate for these issues. This makes the chip larger and reduces the number of usable dies per wafer. Since wafers cost tens of thousands of dollars, this is a costly outcome. Mack emphasized that the industry sells die, not wafers.

Memory production shows clear signs of this efficiency gap. A June report from Morgan Stanley estimated that Chinese maker CXMT produces only one-third as many bits per wafer as Western rivals. The bank described lithography access as a hard ceiling for memory development. Mack also cautioned that node labels like five or three nanometers have limited meaning on their own. SMIC's progress is real but remains significantly less scaled than established processes from major competitors.

Older technology still has room for improvement. Micron developed a specific DRAM generation without using EUV. It relied on multiple patterning and tight process control. Mack noted that Micron pushed these tools further than other memory makers. Experts believe CXMT can achieve similar milestones for high-bandwidth memory without EUV. Advanced packaging is also expected to help firms use older tools for the latest DRAM generations by the end of the decade.

However, there are limits to what older tools can do. Micron eventually switched to EUV for its newest DRAM. This change delivered more than 30% greater bit density per wafer. While EUV has its own issues, such as stochastic effects, it remains necessary for the smallest nodes. Mack said he would be hard pressed to believe a three or two nanometer node could be economically viable without it.

Chinese manufacturers will not stop advancing. They can continue pushing older equipment while accepting larger dies and poorer yields. They can also add more production capacity. Morgan Stanley projects CXMT will increase its share of global DRAM supply from 14% in 2026 to 16% in 2028. This growth will happen through new greenfield capacity. The bank also expects China's self-sufficiency in AI chips to rise from 42% in 2025 to 70% by 2030. A persistent gap will remain in EUV, high-bandwidth memory, and advanced software.